Design of High-Speed Multiplier with Optimised Builtinself-Test

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Design of High-Speed Multiplier with Optimised Builtinself-Test

Current trend in Integrated Circuits (IC) implementation such as System-on-Chip has contributed significant advantages in electronic product features such as high circuit performance with high number of functions, small physical area and high reliability. Since the development of System-on-Chip, whi...

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Bibliographic Details
Main Author:	Wan Hasan, Wan Zuha
Format:	Thesis
Language:	English English
Published:	2000
Subjects:	Multiplier (Economics)
Online Access:	http://psasir.upm.edu.my/id/eprint/10478/ http://psasir.upm.edu.my/id/eprint/10478/1/FK_2000_14.pdf

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