The design of optimum inverter - Justin, anak James (Universiti Malaysia Sarawak, UNIMAS, 2010)
This report presents the design and analysis of the inverter. The design is based on the CMOS inverter that consists of PMOS and NMOS transistors. The analysis is based on the current leakage and time delay during switching the inputs to be output. Up to 20 different transistor sizes were implemented in the same design with varying transistor width, W and length, L. The optimum size of W and L of the transistor will improve the current leakage and time delay of the CMOS inverter. The CMOS is designed using computer simulation and analysis is done using the MICROWIND simulation system. This report also provides a basic understanding of chips design and how performance of simulation can be done. The information will help to design the optimum inverter.