Designing 8-Bit multiplier
The Fundamental of Multiplying two binary Numbers is the most often use arithmetic operation in the Digital Signal Processor. Therefore, Multiplier design block is especially crucial in VLSI prospectus when Speed and Area is the concern. Many of the Design Topologies regarding this operation has bee...
| Main Author: | |
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| Format: | Final Year Project Report / IMRAD |
| Language: | English |
| Published: |
University Malaysia Sarawak, UNIMAS.
2006
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| Subjects: | |
| Online Access: | http://ir.unimas.my/id/eprint/2816/ http://ir.unimas.my/id/eprint/2816/8/YEE%20MING%20FATT.pdf |
| _version_ | 1848835077004328960 |
|---|---|
| author | Yee, M.F |
| author_facet | Yee, M.F |
| author_sort | Yee, M.F |
| building | UNIMAS Institutional Repository |
| collection | Online Access |
| description | The Fundamental of Multiplying two binary Numbers is the most often use arithmetic operation in the Digital Signal Processor. Therefore, Multiplier design block is especially crucial in VLSI prospectus when Speed and Area is the concern. Many of the Design Topologies regarding this operation has been approached over the years. |
| first_indexed | 2025-11-15T06:02:08Z |
| format | Final Year Project Report / IMRAD |
| id | unimas-2816 |
| institution | Universiti Malaysia Sarawak |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-15T06:02:08Z |
| publishDate | 2006 |
| publisher | University Malaysia Sarawak, UNIMAS. |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | unimas-28162024-03-15T08:25:16Z http://ir.unimas.my/id/eprint/2816/ Designing 8-Bit multiplier Yee, M.F TK Electrical engineering. Electronics Nuclear engineering The Fundamental of Multiplying two binary Numbers is the most often use arithmetic operation in the Digital Signal Processor. Therefore, Multiplier design block is especially crucial in VLSI prospectus when Speed and Area is the concern. Many of the Design Topologies regarding this operation has been approached over the years. University Malaysia Sarawak, UNIMAS. 2006 Final Year Project Report / IMRAD NonPeerReviewed text en http://ir.unimas.my/id/eprint/2816/8/YEE%20MING%20FATT.pdf Yee, M.F (2006) Designing 8-Bit multiplier. [Final Year Project Report / IMRAD] (Unpublished) |
| spellingShingle | TK Electrical engineering. Electronics Nuclear engineering Yee, M.F Designing 8-Bit multiplier |
| title | Designing 8-Bit multiplier |
| title_full | Designing 8-Bit multiplier |
| title_fullStr | Designing 8-Bit multiplier |
| title_full_unstemmed | Designing 8-Bit multiplier |
| title_short | Designing 8-Bit multiplier |
| title_sort | designing 8-bit multiplier |
| topic | TK Electrical engineering. Electronics Nuclear engineering |
| url | http://ir.unimas.my/id/eprint/2816/ http://ir.unimas.my/id/eprint/2816/8/YEE%20MING%20FATT.pdf |