Performance of CMOS Schmitt Trigger
This paper presents the effect of load capacitance and source voltage on performance of proposed Schmitt trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. All simulation results hav...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE
2008
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| Subjects: | |
| Online Access: | http://ir.unimas.my/id/eprint/16596/ http://ir.unimas.my/id/eprint/16596/1/Performance%20of%20CMOS%20Schmitt%20Trigger%28abstract%29.pdf |
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| author | Rohana, Sapawi Chee, R.L.S Siti Kudnie, Sahari Norhuzaimin, Julai |
| author_facet | Rohana, Sapawi Chee, R.L.S Siti Kudnie, Sahari Norhuzaimin, Julai |
| author_sort | Rohana, Sapawi |
| building | UNIMAS Institutional Repository |
| collection | Online Access |
| description | This paper presents the effect of load capacitance and
source voltage on performance of proposed Schmitt
trigger circuit. The proposed circuit was designed based
on Conventional Schmitt Trigger by manipulating the
arrangement of transistors and the width-length ratio. All
simulation results have been carried out based on
Microwind software on three different designs in term of
propagation delay, Energy-delay Product and hystheresis.
From the result, the proposed full swing CMOS Schmitt
Trigger was able to operate as low voltage (0.8V-1.5V). |
| first_indexed | 2025-11-15T06:50:09Z |
| format | Article |
| id | unimas-16596 |
| institution | Universiti Malaysia Sarawak |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-15T06:50:09Z |
| publishDate | 2008 |
| publisher | IEEE |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | unimas-165962017-06-12T05:51:40Z http://ir.unimas.my/id/eprint/16596/ Performance of CMOS Schmitt Trigger Rohana, Sapawi Chee, R.L.S Siti Kudnie, Sahari Norhuzaimin, Julai TK Electrical engineering. Electronics Nuclear engineering This paper presents the effect of load capacitance and source voltage on performance of proposed Schmitt trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. All simulation results have been carried out based on Microwind software on three different designs in term of propagation delay, Energy-delay Product and hystheresis. From the result, the proposed full swing CMOS Schmitt Trigger was able to operate as low voltage (0.8V-1.5V). IEEE 2008 Article PeerReviewed text en http://ir.unimas.my/id/eprint/16596/1/Performance%20of%20CMOS%20Schmitt%20Trigger%28abstract%29.pdf Rohana, Sapawi and Chee, R.L.S and Siti Kudnie, Sahari and Norhuzaimin, Julai (2008) Performance of CMOS Schmitt Trigger. International Conference on Computer and Communication Engineering, 2008. ICCCE 2008. ISSN ISBN: 978-1-4244-1691-2 http://ieeexplore.ieee.org/document/4580818/ 10.1109/ICCCE.2008.4580818 |
| spellingShingle | TK Electrical engineering. Electronics Nuclear engineering Rohana, Sapawi Chee, R.L.S Siti Kudnie, Sahari Norhuzaimin, Julai Performance of CMOS Schmitt Trigger |
| title | Performance of CMOS Schmitt Trigger |
| title_full | Performance of CMOS Schmitt Trigger |
| title_fullStr | Performance of CMOS Schmitt Trigger |
| title_full_unstemmed | Performance of CMOS Schmitt Trigger |
| title_short | Performance of CMOS Schmitt Trigger |
| title_sort | performance of cmos schmitt trigger |
| topic | TK Electrical engineering. Electronics Nuclear engineering |
| url | http://ir.unimas.my/id/eprint/16596/ http://ir.unimas.my/id/eprint/16596/ http://ir.unimas.my/id/eprint/16596/ http://ir.unimas.my/id/eprint/16596/1/Performance%20of%20CMOS%20Schmitt%20Trigger%28abstract%29.pdf |