Diameter Optimization of Nano-scale SiNWT Based SRAM Cell

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Diameter Optimization of Nano-scale SiNWT Based SRAM Cell

This paper represents diameter and logic voltage level optimizations of 6-Silicon Nanowire Transistors (SiNWT) SRAM. This study is to demonstrate diameter of nanowires effects at a different logic voltage level (Vdd) on the static characteristics of Nano-scale SiNWT Based SRAM Cell. Noise margins (N...

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Bibliographic Details
Main Authors:	Naif, Yasir Hashim, Hadi, Manap
Format:	Conference or Workshop Item
Language:	English
Published:	2015
Subjects:	QC Physics TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://umpir.ump.edu.my/id/eprint/11635/ http://umpir.ump.edu.my/id/eprint/11635/1/ICCSCE2015%20Paper.pdf

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