VHDL description for IP Engine / Zeliall Bathich
Developing hardware support for network layer protocol processing is a very complex and demanding task. However. for optimal performance hardware acceleration can be required. To cope with the situation. this project present a high-level design approach. which targets the development of configurable...
| Main Author: | Zeliall, Bathich |
|---|---|
| Format: | Thesis |
| Published: |
2000
|
| Subjects: | |
| Online Access: | http://studentsrepo.um.edu.my/9932/ http://studentsrepo.um.edu.my/9932/1/Zeliall_Bathich_%2D_Academic_exercise.pdf |
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