VHDL implementation of DES algorithm / Emmanvel Kajan Mering

This project is about the development of DES in hardware. DES, and it's variants (tripleDES) are the main encryption methods used in industry today. The DES designed should be able to process a 64-bit data block and it's 64-bit key and produces a 64-bit encrypted output. It also acts as de...

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Main Author: Emmanvel, Kajan Mering
Format: Thesis
Published: 2004
Subjects:
Online Access:http://studentsrepo.um.edu.my/10757/
http://studentsrepo.um.edu.my/10757/1/Emmanvel_Kajan_Mering.pdf
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author Emmanvel, Kajan Mering
author_facet Emmanvel, Kajan Mering
author_sort Emmanvel, Kajan Mering
building UM Research Repository
collection Online Access
description This project is about the development of DES in hardware. DES, and it's variants (tripleDES) are the main encryption methods used in industry today. The DES designed should be able to process a 64-bit data block and it's 64-bit key and produces a 64-bit encrypted output. It also acts as decryptor, which is done by entering the 64-bit encrypted data together with the sub-key (operate in decrypt mode, where key is entered in reverse order). In order for our DES to work, modules are designed. These modules are controller, RAM, the DES core (initdata) and sub-key generator. All these submodules are developed, and then integrated as a complete DES cryptosystem. This DES system will be developed using VHSIC Hardware Description Language (VHDL). This is a complete report, from the designing phase up to the system testing at the end.
first_indexed 2025-11-14T13:54:52Z
format Thesis
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institution University Malaya
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last_indexed 2025-11-14T13:54:52Z
publishDate 2004
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spelling um-107572020-02-23T18:42:49Z VHDL implementation of DES algorithm / Emmanvel Kajan Mering Emmanvel, Kajan Mering QA75 Electronic computers. Computer science T Technology (General) This project is about the development of DES in hardware. DES, and it's variants (tripleDES) are the main encryption methods used in industry today. The DES designed should be able to process a 64-bit data block and it's 64-bit key and produces a 64-bit encrypted output. It also acts as decryptor, which is done by entering the 64-bit encrypted data together with the sub-key (operate in decrypt mode, where key is entered in reverse order). In order for our DES to work, modules are designed. These modules are controller, RAM, the DES core (initdata) and sub-key generator. All these submodules are developed, and then integrated as a complete DES cryptosystem. This DES system will be developed using VHSIC Hardware Description Language (VHDL). This is a complete report, from the designing phase up to the system testing at the end. 2004 Thesis NonPeerReviewed application/pdf http://studentsrepo.um.edu.my/10757/1/Emmanvel_Kajan_Mering.pdf Emmanvel, Kajan Mering (2004) VHDL implementation of DES algorithm / Emmanvel Kajan Mering. Undergraduates thesis, University of Malaya. http://studentsrepo.um.edu.my/10757/
spellingShingle QA75 Electronic computers. Computer science
T Technology (General)
Emmanvel, Kajan Mering
VHDL implementation of DES algorithm / Emmanvel Kajan Mering
title VHDL implementation of DES algorithm / Emmanvel Kajan Mering
title_full VHDL implementation of DES algorithm / Emmanvel Kajan Mering
title_fullStr VHDL implementation of DES algorithm / Emmanvel Kajan Mering
title_full_unstemmed VHDL implementation of DES algorithm / Emmanvel Kajan Mering
title_short VHDL implementation of DES algorithm / Emmanvel Kajan Mering
title_sort vhdl implementation of des algorithm / emmanvel kajan mering
topic QA75 Electronic computers. Computer science
T Technology (General)
url http://studentsrepo.um.edu.my/10757/
http://studentsrepo.um.edu.my/10757/1/Emmanvel_Kajan_Mering.pdf