Parallel form of the pipelined intermediate architecture for two-dimensional discrete wavelet transform

Parallel form of the pipelined intermediate architecture for two-dimensional discrete wavelet transform

A lifting-based VLSI architecture for two-dimensional discrete wavelet transform (2-D DWT) for 5/3 and 9/7 algorithms, called, pipelined intermediate architecture was proposed by Ibrahim et al., which aim at reducing power consumption of the overlapped external memory access without using the expens...

Full description

Bibliographic Details
Main Authors: Koko I., Saeed, H., Agustiawan
Format: Citation Index Journal
Language:English
Published: 2009
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://scholars.utp.edu.my/id/eprint/417/
http://scholars.utp.edu.my/id/eprint/417/1/paper.pdf

Similar Items

Similar Items