Optimization of Processor Architecture for Image Edge Detection Filter

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Optimization of Processor Architecture for Image Edge Detection Filter

In this paper, a dedicated edge detection processor architecture based on field programmable gate arrays is presented. The architecture is an optimization of the Sobel edge detection filter, specifically focusing on the reduction of the computation time. The proposed architecture reduces the number...

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Bibliographic Details
Main Authors:	M. Osman, Zahraa Elhassan, Hussin, Fawnizu Azmadi, Zain Ali, Noohul Basheer
Format:	Conference or Workshop Item
Language:	English
Published:	2010
Subjects:	QA75 Electronic computers. Computer science
Online Access:	http://scholars.utp.edu.my/id/eprint/2089/ http://scholars.utp.edu.my/id/eprint/2089/1/Cambridg_paper_-_final_version.pdf

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