Dynamic power saving for CMOS circuits

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Dynamic power saving for CMOS circuits

With more functionalities being integrated into a microchip today, higher processing power is drawn. As a result of this, clock and logic power consumption has turned out to be a critical issue to be coped with by chip designers. In this paper, we present various power-saving approaches employed in...

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Bibliographic Details
Main Authors:	Yeap, Kim Ho, Ng, Len Luet, Ahmad Uzair Mazlan, Loh, Siu Hong, Tshai, Kim Hoe
Format:	Article
Language:	English
Published:	Penerbit Universiti Kebangsaan Malaysia 2024
Online Access:	http://journalarticle.ukm.my/25528/ http://journalarticle.ukm.my/25528/1/kejut_6.pdf

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