Developing power semiconductor device model for virtual prototyping of power electronics systems
Virtual prototyping (VP) is very important for power electronics systems design. A virtual prototyping design tool based on different modelling technology and model order reduction is proposed in the paper. In order to combine circuit electromagnetic model with power semiconductor device models, a S...
| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Published: |
2016
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| Subjects: | |
| Online Access: | https://eprints.nottingham.ac.uk/38779/ |
| Summary: | Virtual prototyping (VP) is very important for power electronics systems design. A virtual prototyping design tool based on different modelling technology and model order reduction is proposed in the paper. In order to combine circuit electromagnetic model with power semiconductor device models, a SiC-JFET behavioural model is presented and implemented in the design tool. A half bridge circuit using SiC-JFET devices is thus represented in the VP software. The presented SiC-JFET behavioural model is then validated by comparing with experimental measurements on switching waveforms. |
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