Architecture And Logic Design Of A Discrete Wavelet Transform Processor

Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thes...

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Main Author: Lim , Soon Chieh
Format: Thesis
Published: 2005
Subjects:
Online Access:http://shdl.mmu.edu.my/786/
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author Lim , Soon Chieh
author_facet Lim , Soon Chieh
author_sort Lim , Soon Chieh
building MMU Institutional Repository
collection Online Access
description Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT.
first_indexed 2025-11-14T17:59:18Z
format Thesis
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institution Multimedia University
institution_category Local University
last_indexed 2025-11-14T17:59:18Z
publishDate 2005
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spelling mmu-7862010-07-02T04:24:58Z http://shdl.mmu.edu.my/786/ Architecture And Logic Design Of A Discrete Wavelet Transform Processor Lim , Soon Chieh QA Mathematics Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT. 2005-03 Thesis NonPeerReviewed Lim , Soon Chieh (2005) Architecture And Logic Design Of A Discrete Wavelet Transform Processor. Masters thesis, Multimedia University. http://myto.perpun.net.my/metoalogin/logina.php
spellingShingle QA Mathematics
Lim , Soon Chieh
Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_full Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_fullStr Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_full_unstemmed Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_short Architecture And Logic Design Of A Discrete Wavelet Transform Processor
title_sort architecture and logic design of a discrete wavelet transform processor
topic QA Mathematics
url http://shdl.mmu.edu.my/786/
http://shdl.mmu.edu.my/786/