Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits

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Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits

This thesis investigates the proposed layout techniques that imitates the triple well process by doing it on the conventional process technology. This proposed layout is fabricated and the results show that the layout techniques managers to change the threshold voltage. However, there are certain is...

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Bibliographic Details
Main Author:	Abdul Khalek, Mohd Faizal
Format:	Thesis
Published:	2009
Subjects:	TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://shdl.mmu.edu.my/376/

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