Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits
This thesis investigates the proposed layout techniques that imitates the triple well process by doing it on the conventional process technology. This proposed layout is fabricated and the results show that the layout techniques managers to change the threshold voltage. However, there are certain is...
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| Format: | Thesis |
| Published: |
2009
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| Online Access: | http://shdl.mmu.edu.my/376/ |
| _version_ | 1848789489309188096 |
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| author | Abdul Khalek, Mohd Faizal |
| author_facet | Abdul Khalek, Mohd Faizal |
| author_sort | Abdul Khalek, Mohd Faizal |
| building | MMU Institutional Repository |
| collection | Online Access |
| description | This thesis investigates the proposed layout techniques that imitates the triple well process by doing it on the conventional process technology. This proposed layout is fabricated and the results show that the layout techniques managers to change the threshold voltage. However, there are certain issues that need to be dealt with the drain current effects of the layout. |
| first_indexed | 2025-11-14T17:57:32Z |
| format | Thesis |
| id | mmu-376 |
| institution | Multimedia University |
| institution_category | Local University |
| last_indexed | 2025-11-14T17:57:32Z |
| publishDate | 2009 |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | mmu-3762010-06-04T04:30:06Z http://shdl.mmu.edu.my/376/ Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits Abdul Khalek, Mohd Faizal TK Electrical engineering. Electronics Nuclear engineering This thesis investigates the proposed layout techniques that imitates the triple well process by doing it on the conventional process technology. This proposed layout is fabricated and the results show that the layout techniques managers to change the threshold voltage. However, there are certain issues that need to be dealt with the drain current effects of the layout. 2009-05 Thesis NonPeerReviewed Abdul Khalek, Mohd Faizal (2009) Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits. Masters thesis, Multimedia University. http://vlib.mmu.edu.my/diglib/login/dlusr/login.php |
| spellingShingle | TK Electrical engineering. Electronics Nuclear engineering Abdul Khalek, Mohd Faizal Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits |
| title | Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits |
| title_full | Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits |
| title_fullStr | Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits |
| title_full_unstemmed | Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits |
| title_short | Low Power Design And Layout Techniques For CMOS Mixed - Signal Circuits |
| title_sort | low power design and layout techniques for cmos mixed - signal circuits |
| topic | TK Electrical engineering. Electronics Nuclear engineering |
| url | http://shdl.mmu.edu.my/376/ http://shdl.mmu.edu.my/376/ |