VHDL modelling of the open short tester

IC (Integrated Circuitry) testing requires the very advanced and sophisticated Advance Test Equipment (ATE) that costs multi million USD. The cost of IC testing is increasing yearly and it will exceed the cost of manufacturing in future. The manufacturers are interested to lower down the manufacturi...

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Main Authors: Pang, W. L., Chew, K. W., Choong, Florence, Chan, C. L.
Format: Conference or Workshop Item
Published: 2007
Subjects:
Online Access:http://shdl.mmu.edu.my/3191/
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author Pang, W. L.
Chew, K. W.
Choong, Florence
Chan, C. L.
author_facet Pang, W. L.
Chew, K. W.
Choong, Florence
Chan, C. L.
author_sort Pang, W. L.
building MMU Institutional Repository
collection Online Access
description IC (Integrated Circuitry) testing requires the very advanced and sophisticated Advance Test Equipment (ATE) that costs multi million USD. The cost of IC testing is increasing yearly and it will exceed the cost of manufacturing in future. The manufacturers are interested to lower down the manufacturing cost. Low cost tester is one of the options to reduce the manufacturing cost. The low cost FPGA realization of Open/Short Test on IC is introduced to reduce the IC test cost. The open short test is selected, because it is the first IC test. The Very High Speed Integrated Circuit Hardware Description Language (VHDL) is used to model the Open/Short Test on IC and the design is capable to perform the open/short test.
first_indexed 2025-11-14T18:09:46Z
format Conference or Workshop Item
id mmu-3191
institution Multimedia University
institution_category Local University
last_indexed 2025-11-14T18:09:46Z
publishDate 2007
recordtype eprints
repository_type Digital Repository
spelling mmu-31912011-10-06T02:02:01Z http://shdl.mmu.edu.my/3191/ VHDL modelling of the open short tester Pang, W. L. Chew, K. W. Choong, Florence Chan, C. L. T Technology (General) QA75.5-76.95 Electronic computers. Computer science IC (Integrated Circuitry) testing requires the very advanced and sophisticated Advance Test Equipment (ATE) that costs multi million USD. The cost of IC testing is increasing yearly and it will exceed the cost of manufacturing in future. The manufacturers are interested to lower down the manufacturing cost. Low cost tester is one of the options to reduce the manufacturing cost. The low cost FPGA realization of Open/Short Test on IC is introduced to reduce the IC test cost. The open short test is selected, because it is the first IC test. The Very High Speed Integrated Circuit Hardware Description Language (VHDL) is used to model the Open/Short Test on IC and the design is capable to perform the open/short test. 2007-04 Conference or Workshop Item NonPeerReviewed Pang, W. L. and Chew, K. W. and Choong, Florence and Chan, C. L. (2007) VHDL modelling of the open short tester. In: 6th WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems/7th WSEAS International Conference on Robotics, Control and Manufacturing Technology, 15-17 APR 2007, Hangzhou, PEOPLES R CHINA. http://apps.webofknowledge.com/full_record.do?product=WOS&search_mode=GeneralSearch&qid=1&SID=S1iePfOnkoH@G2@8I1N&page=121&doc=1207
spellingShingle T Technology (General)
QA75.5-76.95 Electronic computers. Computer science
Pang, W. L.
Chew, K. W.
Choong, Florence
Chan, C. L.
VHDL modelling of the open short tester
title VHDL modelling of the open short tester
title_full VHDL modelling of the open short tester
title_fullStr VHDL modelling of the open short tester
title_full_unstemmed VHDL modelling of the open short tester
title_short VHDL modelling of the open short tester
title_sort vhdl modelling of the open short tester
topic T Technology (General)
QA75.5-76.95 Electronic computers. Computer science
url http://shdl.mmu.edu.my/3191/
http://shdl.mmu.edu.my/3191/