APA (7th ed.) Citation

Senthilpari, C., Singh, A. K., & Diwakar, K. (2007). Low power and high speed 8x8 bit multiplier using non-clocked Pass Transistor Logic.

Chicago Style (17th ed.) Citation

Senthilpari, C., Ajay Kumar Singh, and K. Diwakar. Low Power and High Speed 8x8 Bit Multiplier Using Non-clocked Pass Transistor Logic. 2007.

MLA (9th ed.) Citation

Senthilpari, C., et al. Low Power and High Speed 8x8 Bit Multiplier Using Non-clocked Pass Transistor Logic. 2007.