Low-power, high-speed sram design: A review
This article describes the challenges in the design of low-power SRAM and difficulties in designing a high-speed static RAM, Following an overview of general issues, approaches/techniques in achieving low-power SRAM, as well as techniques to increase SRAM operating frequency are described. Following...
| Main Authors: | , , , |
|---|---|
| Format: | Article |
| Published: |
SOC MICROELECTRONICS
2007
|
| Subjects: | |
| Online Access: | http://shdl.mmu.edu.my/3106/ |
| Summary: | This article describes the challenges in the design of low-power SRAM and difficulties in designing a high-speed static RAM, Following an overview of general issues, approaches/techniques in achieving low-power SRAM, as well as techniques to increase SRAM operating frequency are described. Following the overview of each approach, the challenges and trade-offs are outlined. |
|---|