Design of high-speed clock and data recovery circuits
This article describes the various architectures for a high-speed clock and data recovery (CDR) circuit. Following a brief introduction of clock and data recovery circuit, a phase detection circuit, one of the most critical blocks in a CDR that determines not only the performance but also the CDR ar...
| Main Authors: | Tan, Kok Siang, Sulaiman, Mohd Shahiman, Chuah, Hean Teik, Sachdev, Manoj |
|---|---|
| Format: | Article |
| Published: |
Springer US
2007
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| Subjects: | |
| Online Access: | http://shdl.mmu.edu.my/3029/ |
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