A fast-lock delay-locked loop architecture with improved precharged PFD

A fast-lock delay-locked loop architecture with improved precharged PFD

In this paper, a dual charge pump architecture for fast-lock delay-locked loop (DLL) is proposed and analyzed. The proposed fast lock DLL uses only one phase frequency detector (PFD) to perform dual path tuning and a lock control circuit to control the switching between the two path. An improved PFD...

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Bibliographic Details
Main Authors: Lip-Kai, Soh, Sulaiman, Mohd-Shahiman, Yusoff, Zubaida
Format: Article
Language:English
Published: SPRINGER 2008
Subjects:
T Technology (General)
QA75.5-76.95 Electronic computers. Computer science
Online Access:http://shdl.mmu.edu.my/2738/
http://shdl.mmu.edu.my/2738/1/779.pdf

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