A 160-mhz 45-mW asynchronous dual-port 1-mb CMOS SRAM

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A 160-mhz 45-mW asynchronous dual-port 1-mb CMOS SRAM

A 160-Mhz 45-mW asynchronous dual-port 1-Mb CMOS SRAM is described. A minimum read access time of 4.26ns is achieved, with an active power figure of 31 mW, data retention capability at 0.1 V VDD across all skews with varied temperature, and yet consume a standby power of only 80nW. Simulation result...

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Bibliographic Details
Main Authors:	Soon-Hwei, , Tan, Sulaiman, , Mohd S., Poh-Yee, , Loh
Format:	Article
Published:	2005
Subjects:	TA Engineering (General). Civil engineering (General)
Online Access:	http://shdl.mmu.edu.my/2406/

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