A low-power high-speed 1-mb CMOS SRAM
An asynchronous dual-port 1-Mb CMOS SRAM is described. The SRAM can operate at a maximum frequency of 220MHz in dual-port mode and dissipates a minimum active power of 31mW and consumes a minimum standby power of 80nW. Simulation results show that the circuit functions properly over a wide range of...
| Main Authors: | , , |
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| Format: | Article |
| Published: |
2006
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| Subjects: | |
| Online Access: | http://shdl.mmu.edu.my/2081/ |
| Summary: | An asynchronous dual-port 1-Mb CMOS SRAM is described. The SRAM can operate at a maximum frequency of 220MHz in dual-port mode and dissipates a minimum active power of 31mW and consumes a minimum standby power of 80nW. Simulation results show that the circuit functions properly over a wide range of Process, Voltage & Temperature (PVT) corners. SRAM was custom designed using TSMC CMOS 0.25 mu m 1P5M Salicide process and occupies a Silicon area of approximately 115mm(2) (11.5mm x 10mm). |
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