An Architecture and Logic Design of a Discrete Wavelet Transform Processor
Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thes...
| Main Author: | |
|---|---|
| Format: | Thesis |
| Published: |
2005
|
| Subjects: | |
| Online Access: | http://shdl.mmu.edu.my/143/ |
| _version_ | 1848789429891629056 |
|---|---|
| author | Lim, Soon Chieh |
| author_facet | Lim, Soon Chieh |
| author_sort | Lim, Soon Chieh |
| building | MMU Institutional Repository |
| collection | Online Access |
| description | Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT. |
| first_indexed | 2025-11-14T17:56:35Z |
| format | Thesis |
| id | mmu-143 |
| institution | Multimedia University |
| institution_category | Local University |
| last_indexed | 2025-11-14T17:56:35Z |
| publishDate | 2005 |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | mmu-1432010-02-17T08:30:10Z http://shdl.mmu.edu.my/143/ An Architecture and Logic Design of a Discrete Wavelet Transform Processor Lim, Soon Chieh QA299.6-433 Analysis Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT. 2005 Thesis NonPeerReviewed Lim, Soon Chieh (2005) An Architecture and Logic Design of a Discrete Wavelet Transform Processor. Masters thesis, Multimedia University. http://vlib.mmu.edu.my/diglib/login/dlusr/login.php |
| spellingShingle | QA299.6-433 Analysis Lim, Soon Chieh An Architecture and Logic Design of a Discrete Wavelet Transform Processor |
| title | An Architecture and Logic Design of a Discrete Wavelet Transform Processor |
| title_full | An Architecture and Logic Design of a Discrete Wavelet Transform Processor |
| title_fullStr | An Architecture and Logic Design of a Discrete Wavelet Transform Processor |
| title_full_unstemmed | An Architecture and Logic Design of a Discrete Wavelet Transform Processor |
| title_short | An Architecture and Logic Design of a Discrete Wavelet Transform Processor |
| title_sort | architecture and logic design of a discrete wavelet transform processor |
| topic | QA299.6-433 Analysis |
| url | http://shdl.mmu.edu.my/143/ http://shdl.mmu.edu.my/143/ |