Effect of single event upset on 6T and 12T 32NM CMOS SRAMs circuit
Static random access memory cells (SRAM) are high-speed semiconductor memory that uses flip-flop to store each bit. Over the years, technology scaling of complementary metaloxide semiconductor (CMOS) devices has also resulted in the scaling of SRAM using minimum-size transistors. As transistor si...
| Main Authors: | Yusop, Nur Syafiqah, Mahmud, Manzar, Nordin, Anis Nurashikin, Hasbullah, Nurul Fadzlin |
|---|---|
| Format: | Proceeding Paper |
| Language: | English |
| Published: |
Penerbit UMT, Universiti Malaysia Terengganu (UMT)
2016
|
| Subjects: | |
| Online Access: | http://irep.iium.edu.my/51579/ http://irep.iium.edu.my/51579/1/51579_Effect%20of%20single%20event.pdf |
Similar Items
The impact of scaling on single event upset in 6T and 12T SRAMs from 130 to 22 nm CMOS technology
by: Yusop, N. S., et al.
Published: (2018)
by: Yusop, N. S., et al.
Published: (2018)
Single-event Transient (SET) effects on 60nm and 32nm 3T CMOS active pixel sensor
by: Ahamad Sukor, Masturah, et al.
Published: (2016)
by: Ahamad Sukor, Masturah, et al.
Published: (2016)
The Design of Low Power CMOS SRAM Subsystems
by: Lee, Chu Liang
Published: (2001)
by: Lee, Chu Liang
Published: (2001)
A low-power high-speed 1-mb CMOS SRAM
by: Tan, , SH, et al.
Published: (2006)
by: Tan, , SH, et al.
Published: (2006)
Low-power dual-port asynchronous CMOS SRAM design techniques
by: Tan, Soon-Hwei, et al.
Published: (2007)
by: Tan, Soon-Hwei, et al.
Published: (2007)
Low-power dual-port asynchronous CMOS SRAM design techniques
by: Tan, Soon-Hwei, et al.
Published: (2007)
by: Tan, Soon-Hwei, et al.
Published: (2007)
Investigation and statistical simulation of variation aware 14nm SRAM cache memory architecture
by: Pour, Somayeh Rahimi
Published: (2011)
by: Pour, Somayeh Rahimi
Published: (2011)
130 nm low power CMOS analog multiplier
by: Abu Naim, Ahmad Safuan, et al.
Published: (2018)
by: Abu Naim, Ahmad Safuan, et al.
Published: (2018)
12N test procedure for NPSF testing and diagnosis for SRAMs
by: Rusli, Julie Roslita, et al.
Published: (2008)
by: Rusli, Julie Roslita, et al.
Published: (2008)
Design A High Performance Dual Ported 1 Read 1 Write CMOS SRAM
by: Yeoh, Ee Ee
Published: (2006)
by: Yeoh, Ee Ee
Published: (2006)
Optimized transconductance designs to enhance the linearity performance of RF front-end receiver circuits in 130 NM CMOS technology / Nandini Vitee
by: Nandini , Vitee
Published: (2020)
by: Nandini , Vitee
Published: (2020)
Design of a low-noise low-power front-end readout circuit for neutron detection using 130nm CMOS technology
by: Aimaier, Nueraimaiti
Published: (2015)
by: Aimaier, Nueraimaiti
Published: (2015)
A 160-mhz 45-mW asynchronous dual-port 1-mb CMOS SRAM
by: Soon-Hwei, , Tan, et al.
Published: (2005)
by: Soon-Hwei, , Tan, et al.
Published: (2005)
Implementation of CMOS oscillator for CMOS SAW resonator
by: Karim, Jamilah, et al.
Published: (2016)
by: Karim, Jamilah, et al.
Published: (2016)
Obesity: Upsetting the Public Health Balance
by: Binns, Colin, et al.
Published: (2013)
by: Binns, Colin, et al.
Published: (2013)
What is upsetting our children online?
by: Teimouri, Misha, et al.
Published: (2014)
by: Teimouri, Misha, et al.
Published: (2014)
A multiband 130nm CMOS low noise amplifier for LTE bands
by: Kamsani, Noor Ain, et al.
Published: (2015)
by: Kamsani, Noor Ain, et al.
Published: (2015)
Low power 130 nm CMOS Johnson Counter with clock gating technique
by: Amran, Nur Syuhadah, et al.
Published: (2018)
by: Amran, Nur Syuhadah, et al.
Published: (2018)
Design and evaluation of multimode multiband power amplifier in 130nm CMOS process
by: Thangasamy, Veeraiyah
Published: (2016)
by: Thangasamy, Veeraiyah
Published: (2016)
Single event transient effects on 3T and 4T CMOS
active pixel sensors for different technologies
by: Ahamad Sukor, Masturah, et al.
Published: (2019)
by: Ahamad Sukor, Masturah, et al.
Published: (2019)
Dynamic power saving for CMOS circuits
by: Yeap, Kim Ho, et al.
Published: (2024)
by: Yeap, Kim Ho, et al.
Published: (2024)
Design and simulation of RF-CMOS spiral inductors for ISM band RFID reader circuits
by: Uddin, Md. Jasim, et al.
Published: (2009)
by: Uddin, Md. Jasim, et al.
Published: (2009)
Equivalent circuit modeling of two-port Al-doped Zinc Oxide CMOS SAW resonator using MATLABâ„¢
by: Md Ralib @ Md Raghib, Aliza 'Aini, et al.
Published: (2013)
by: Md Ralib @ Md Raghib, Aliza 'Aini, et al.
Published: (2013)
A multiband 130nm CMOS second order band pass filter for LTE bands
by: Kamsani, Noor Ain, et al.
Published: (2015)
by: Kamsani, Noor Ain, et al.
Published: (2015)
High-Performance CMOS Clock And Data Recovery Circuit
by: Tan, Kok Siang
Published: (2006)
by: Tan, Kok Siang
Published: (2006)
Modest Target For Frences Will Take A Stab At Creating Upsets
by: The Star, Ng Wei Loon
Published: (2008)
by: The Star, Ng Wei Loon
Published: (2008)
Sarawak politicians upset over survey of Dayak ministers and deputies
by: Then, Stephen
Published: (2025)
by: Then, Stephen
Published: (2025)
Theoretical design of CMOS SAW resonator
by: Soeroso, Iksannurazmi Bambang, et al.
Published: (2012)
by: Soeroso, Iksannurazmi Bambang, et al.
Published: (2012)
CMOS operational amplifier design
by: Ma, Li Ya, et al.
Published: (2011)
by: Ma, Li Ya, et al.
Published: (2011)
Study Of Basic 22nm Transistor Technology On
Sequential Circuit Using Primetime
by: Nik Hassan, Nik Azman
Published: (2013)
by: Nik Hassan, Nik Azman
Published: (2013)
Multi‑frequency CMOS oscillator based on CMOS MEMS
SAW resonator
by: Karim, Jamilah, et al.
Published: (2015)
by: Karim, Jamilah, et al.
Published: (2015)
Multi-frequency CMOS oscillator based on CMOS MEMS SAW resonator
by: Karim, Jamilah, et al.
Published: (2015)
by: Karim, Jamilah, et al.
Published: (2015)
A 5Gbit/s CMOS clock and data recovery circuit
by: Sulaiman , Mohd Shahiman, et al.
Published: (2005)
by: Sulaiman , Mohd Shahiman, et al.
Published: (2005)
A New Simulation Model for Nanowire-CMOS Inverter Circuit
by: Naif, Yasir Hashim
Published: (2016)
by: Naif, Yasir Hashim
Published: (2016)
Development of Test Procedure For CMOS Operational Amplifier Application Circuits
by: Abdul Halin, Izhal
Published: (2002)
by: Abdul Halin, Izhal
Published: (2002)
Scattering-limited and ballistic transport in a nano-CMOS circuit
by: Saad, Ismail, et al.
Published: (2008)
by: Saad, Ismail, et al.
Published: (2008)
Multistage Power Amplifier In 180nm Cmos Technology With Integrated Passive Linearizer For IEEE 802.15
Application
by: Gunasegaran, Premmilaah
Published: (2018)
by: Gunasegaran, Premmilaah
Published: (2018)
An efficient fault syndromes simulator for SRAM memories
by: Wan Hasan, Wan Zuha, et al.
Published: (2009)
by: Wan Hasan, Wan Zuha, et al.
Published: (2009)
Modeling and fabrication of CMOS surface acoustic wave resonators
by: Nordin, Anis Nurashikin, et al.
Published: (2007)
by: Nordin, Anis Nurashikin, et al.
Published: (2007)
CMOS surface acoustic wave oscillators
by: Nordin, Anis Nurashikin, et al.
Published: (2005)
by: Nordin, Anis Nurashikin, et al.
Published: (2005)
Similar Items
-
The impact of scaling on single event upset in 6T and 12T SRAMs from 130 to 22 nm CMOS technology
by: Yusop, N. S., et al.
Published: (2018) -
Single-event Transient (SET) effects on 60nm and 32nm 3T CMOS active pixel sensor
by: Ahamad Sukor, Masturah, et al.
Published: (2016) -
The Design of Low Power CMOS SRAM Subsystems
by: Lee, Chu Liang
Published: (2001) -
A low-power high-speed 1-mb CMOS SRAM
by: Tan, , SH, et al.
Published: (2006) -
Low-power dual-port asynchronous CMOS SRAM design techniques
by: Tan, Soon-Hwei, et al.
Published: (2007)