CNTFET inverter: a high voltage gain logic gate
Conventional CMOS technology provides a lot of opportunities in the field of electronics device. But presently, carbon nanotube field effect transistor (CNTFET) is a new technology for the application in the field of electronic device. Due to the limitation of the size of CMOS, CNTFETs are the promi...
| Main Authors: | , , |
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| Format: | Proceeding Paper |
| Language: | English English |
| Published: |
2014
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| Online Access: | http://irep.iium.edu.my/42279/ http://irep.iium.edu.my/42279/1/ICSIMA_2014-Soheli.pdf http://irep.iium.edu.my/42279/4/42279_CNTFET%20inverter_Scopus.pdf |
| _version_ | 1848782245716819968 |
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| author | Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz |
| author_facet | Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz |
| author_sort | Farhana, Soheli |
| building | IIUM Repository |
| collection | Online Access |
| description | Conventional CMOS technology provides a lot of opportunities in the field of electronics device. But presently, carbon nanotube field effect transistor (CNTFET) is a new technology for the application in the field of electronic device. Due to the limitation of the size of CMOS, CNTFETs are the promising substitute due to its nano scale size. CNTFET also shows the high stability, low power circuit design, high signal to noise margin (SNM) and high gain in the circuit design. A novel design of CNTFET based inverter with an optimum chiral vector is proposed in this paper. PSPICE platform is used to model and simulation this CNTFET inverter circuit. The proposed CNTFET inverter circuit is investigated based on noise margin characteristics. A maximum voltage gain of 45dB is observed from NCNTFET of the inverter and a high noise margin of 400mV and a low noise margin of 309mV are achieved from the proposed inverters. This approach is a useful technique for fabricating integrated logic devices and circuits based on CNTFETs. |
| first_indexed | 2025-11-14T16:02:24Z |
| format | Proceeding Paper |
| id | iium-42279 |
| institution | International Islamic University Malaysia |
| institution_category | Local University |
| language | English English |
| last_indexed | 2025-11-14T16:02:24Z |
| publishDate | 2014 |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | iium-422792017-09-21T01:14:20Z http://irep.iium.edu.my/42279/ CNTFET inverter: a high voltage gain logic gate Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz TK Electrical engineering. Electronics Nuclear engineering Conventional CMOS technology provides a lot of opportunities in the field of electronics device. But presently, carbon nanotube field effect transistor (CNTFET) is a new technology for the application in the field of electronic device. Due to the limitation of the size of CMOS, CNTFETs are the promising substitute due to its nano scale size. CNTFET also shows the high stability, low power circuit design, high signal to noise margin (SNM) and high gain in the circuit design. A novel design of CNTFET based inverter with an optimum chiral vector is proposed in this paper. PSPICE platform is used to model and simulation this CNTFET inverter circuit. The proposed CNTFET inverter circuit is investigated based on noise margin characteristics. A maximum voltage gain of 45dB is observed from NCNTFET of the inverter and a high noise margin of 400mV and a low noise margin of 309mV are achieved from the proposed inverters. This approach is a useful technique for fabricating integrated logic devices and circuits based on CNTFETs. 2014-11 Proceeding Paper PeerReviewed application/pdf en http://irep.iium.edu.my/42279/1/ICSIMA_2014-Soheli.pdf application/pdf en http://irep.iium.edu.my/42279/4/42279_CNTFET%20inverter_Scopus.pdf Farhana, Soheli and Alam, A. H. M. Zahirul and Khan, Sheroz (2014) CNTFET inverter: a high voltage gain logic gate. In: 2014 IEEE International Conference on Smart Instrumentation, Measurement and Applications (ICSIMA 2014), 25 November 2014, Kuala Lumpur, MAlaysia. http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=7047424&openedRefinements%3D*%26filter%3DAND%28AND%28NOT%284283010803%29%29%2CAND%28NOT%284283010803%29%29%29%26pageNumber%3D11%26rowsPerPage%3D100%26queryText%3D%28cmos+logic+technology+%29 |
| spellingShingle | TK Electrical engineering. Electronics Nuclear engineering Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz CNTFET inverter: a high voltage gain logic gate |
| title | CNTFET inverter: a high voltage gain logic gate |
| title_full | CNTFET inverter: a high voltage gain logic gate |
| title_fullStr | CNTFET inverter: a high voltage gain logic gate |
| title_full_unstemmed | CNTFET inverter: a high voltage gain logic gate |
| title_short | CNTFET inverter: a high voltage gain logic gate |
| title_sort | cntfet inverter: a high voltage gain logic gate |
| topic | TK Electrical engineering. Electronics Nuclear engineering |
| url | http://irep.iium.edu.my/42279/ http://irep.iium.edu.my/42279/ http://irep.iium.edu.my/42279/1/ICSIMA_2014-Soheli.pdf http://irep.iium.edu.my/42279/4/42279_CNTFET%20inverter_Scopus.pdf |