Architecture and network-on-chip implementation of a new hierarchical interconnection network
A Midimew-connected Mesh Network (MMN) is a minimal distance mesh with wrap-around links network of multiple basic modules (BMs), in which the BMs are 2D-mesh networks that are hierarchically interconnected for higher-level networks. In this paper, we present the architecture of the MMN, addressing...
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| Format: | Article |
| Language: | English |
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World Scientic Publishing Company
2015
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| Online Access: | http://irep.iium.edu.my/39569/ http://irep.iium.edu.my/39569/1/JCSC_Pub.pdf |
| _version_ | 1848781811711213568 |
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| author | Awal, Md. Rabiul Rahman, M.M. Hafizur Mohd. Nor, Rizal Sembok, Tengku Mohd Akhand, M. A. H |
| author_facet | Awal, Md. Rabiul Rahman, M.M. Hafizur Mohd. Nor, Rizal Sembok, Tengku Mohd Akhand, M. A. H |
| author_sort | Awal, Md. Rabiul |
| building | IIUM Repository |
| collection | Online Access |
| description | A Midimew-connected Mesh Network (MMN) is a minimal distance mesh with wrap-around links network of multiple basic modules (BMs), in which the BMs are 2D-mesh networks
that are hierarchically interconnected for higher-level networks. In this paper, we present the architecture of the MMN, addressing of node, routing of message, and evaluate the static network performance of MMN, TESH, mesh and torus networks. In addition, we propose the network-on-chip (NoC) implementation of MMN. With innovative combination of diagonal and hierarchical structure, the MMN possesses several attractive features, including constant degree, small diameter, low cost, small average distance, moderate bisection width and high fault tolerant performance than that of other conventional and hierarchical interconnection
networks. The simple architecture of MMN is also highly suitable for NoC implementation. To implement all the links of level-3 MMN, only four layers are needed which is feasible with current and future VLSI technologies. |
| first_indexed | 2025-11-14T15:55:30Z |
| format | Article |
| id | iium-39569 |
| institution | International Islamic University Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-14T15:55:30Z |
| publishDate | 2015 |
| publisher | World Scientic Publishing Company |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | iium-395692015-04-02T03:18:16Z http://irep.iium.edu.my/39569/ Architecture and network-on-chip implementation of a new hierarchical interconnection network Awal, Md. Rabiul Rahman, M.M. Hafizur Mohd. Nor, Rizal Sembok, Tengku Mohd Akhand, M. A. H TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices A Midimew-connected Mesh Network (MMN) is a minimal distance mesh with wrap-around links network of multiple basic modules (BMs), in which the BMs are 2D-mesh networks that are hierarchically interconnected for higher-level networks. In this paper, we present the architecture of the MMN, addressing of node, routing of message, and evaluate the static network performance of MMN, TESH, mesh and torus networks. In addition, we propose the network-on-chip (NoC) implementation of MMN. With innovative combination of diagonal and hierarchical structure, the MMN possesses several attractive features, including constant degree, small diameter, low cost, small average distance, moderate bisection width and high fault tolerant performance than that of other conventional and hierarchical interconnection networks. The simple architecture of MMN is also highly suitable for NoC implementation. To implement all the links of level-3 MMN, only four layers are needed which is feasible with current and future VLSI technologies. World Scientic Publishing Company 2015-02 Article PeerReviewed application/pdf en http://irep.iium.edu.my/39569/1/JCSC_Pub.pdf Awal, Md. Rabiul and Rahman, M.M. Hafizur and Mohd. Nor, Rizal and Sembok, Tengku Mohd and Akhand, M. A. H (2015) Architecture and network-on-chip implementation of a new hierarchical interconnection network. Journal of Circuits, Systems, and Computers, 24 (2). pp. 1540006-1. ISSN 0218-1266 http://www.worldscientific.com/worldscinet/jcsc 10.1142/S021812661540006X |
| spellingShingle | TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices Awal, Md. Rabiul Rahman, M.M. Hafizur Mohd. Nor, Rizal Sembok, Tengku Mohd Akhand, M. A. H Architecture and network-on-chip implementation of a new hierarchical interconnection network |
| title | Architecture and network-on-chip implementation
of a new hierarchical interconnection network |
| title_full | Architecture and network-on-chip implementation
of a new hierarchical interconnection network |
| title_fullStr | Architecture and network-on-chip implementation
of a new hierarchical interconnection network |
| title_full_unstemmed | Architecture and network-on-chip implementation
of a new hierarchical interconnection network |
| title_short | Architecture and network-on-chip implementation
of a new hierarchical interconnection network |
| title_sort | architecture and network-on-chip implementation
of a new hierarchical interconnection network |
| topic | TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices |
| url | http://irep.iium.edu.my/39569/ http://irep.iium.edu.my/39569/ http://irep.iium.edu.my/39569/ http://irep.iium.edu.my/39569/1/JCSC_Pub.pdf |