Fault tolerant hardware for high performance signal processing
The approach described in this paper uses an array of Field Programmable Gate Array (FPGA) devices to implement a fault tolerant hardware system that can be compared to the running of fault tolerant software on a traditional processor. Fault tolerance is achieved is achieved by using FPGA with on t...
| Main Authors: | , , , |
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| Format: | Proceeding Paper |
| Language: | English |
| Published: |
2008
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| Subjects: | |
| Online Access: | http://irep.iium.edu.my/38157/ http://irep.iium.edu.my/38157/1/Fault_Tolerant_Hardware_for_High_Performance_Signal_Processing.pdf |
| _version_ | 1848781551177826304 |
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| author | Erdogan, S. S. Shaneyfelf, Ted Geok, See Ng Abdul Rahman, Abdul Wahab |
| author_facet | Erdogan, S. S. Shaneyfelf, Ted Geok, See Ng Abdul Rahman, Abdul Wahab |
| author_sort | Erdogan, S. S. |
| building | IIUM Repository |
| collection | Online Access |
| description | The approach described in this paper uses an array of Field
Programmable Gate Array (FPGA) devices to implement a fault tolerant hardware system that can be compared to the running of fault tolerant software on a traditional processor. Fault tolerance is achieved is achieved by using FPGA with on the fly partial programmability feature. Major considerations while mapping to the FPGA includes the size of the area to be mapped and communication issues related to their communication. Area size selection is compared to the page size selection in Operating System Design. Communication issues between modules are compared to the software engineering paradigms dealing with module coupling, fan-in, fan-out and cohesiveness. Finally, the overhead associated with the downloading of the reconfiguration files is discussed. |
| first_indexed | 2025-11-14T15:51:21Z |
| format | Proceeding Paper |
| id | iium-38157 |
| institution | International Islamic University Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-14T15:51:21Z |
| publishDate | 2008 |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | iium-381572020-12-16T15:52:10Z http://irep.iium.edu.my/38157/ Fault tolerant hardware for high performance signal processing Erdogan, S. S. Shaneyfelf, Ted Geok, See Ng Abdul Rahman, Abdul Wahab T Technology (General) The approach described in this paper uses an array of Field Programmable Gate Array (FPGA) devices to implement a fault tolerant hardware system that can be compared to the running of fault tolerant software on a traditional processor. Fault tolerance is achieved is achieved by using FPGA with on the fly partial programmability feature. Major considerations while mapping to the FPGA includes the size of the area to be mapped and communication issues related to their communication. Area size selection is compared to the page size selection in Operating System Design. Communication issues between modules are compared to the software engineering paradigms dealing with module coupling, fan-in, fan-out and cohesiveness. Finally, the overhead associated with the downloading of the reconfiguration files is discussed. 2008 Proceeding Paper NonPeerReviewed application/pdf en http://irep.iium.edu.my/38157/1/Fault_Tolerant_Hardware_for_High_Performance_Signal_Processing.pdf Erdogan, S. S. and Shaneyfelf, Ted and Geok, See Ng and Abdul Rahman, Abdul Wahab (2008) Fault tolerant hardware for high performance signal processing. In: The Fourth Advanced International Conference on Telecommunications AICT '08, 8-13 June 2008, Athens, Greece. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4545565 |
| spellingShingle | T Technology (General) Erdogan, S. S. Shaneyfelf, Ted Geok, See Ng Abdul Rahman, Abdul Wahab Fault tolerant hardware for high performance signal processing |
| title | Fault tolerant hardware for high performance signal processing |
| title_full | Fault tolerant hardware for high performance signal processing |
| title_fullStr | Fault tolerant hardware for high performance signal processing |
| title_full_unstemmed | Fault tolerant hardware for high performance signal processing |
| title_short | Fault tolerant hardware for high performance signal processing |
| title_sort | fault tolerant hardware for high performance signal processing |
| topic | T Technology (General) |
| url | http://irep.iium.edu.my/38157/ http://irep.iium.edu.my/38157/ http://irep.iium.edu.my/38157/1/Fault_Tolerant_Hardware_for_High_Performance_Signal_Processing.pdf |