Development of an efficient algorithm for fetal heart rate detection: a hardware approach - Ibrahimy, Muhammad Ibn; Reaz, Mamun Bin Ibne; Mohd Ali, Mohd Alauddin; T., H. Khoon; Ismail, Ahmad Faris (2006)
An algorithm has been developed for the simultaneous measurement of the fetal and maternal heart rates from the maternal abdominal electrocardiogram during pregnancy and labor for fetal monitoring. The algorithm is based on cross-correlation, adaptive thresholding and statistical properties in the time domain. The algorithm was initially developed and simulated in Visual C++. Once the functionality is verified, it is then converted in VHDL - hardware description language for FPGA implementation. The design is synthesized and fitted into Altera's Stratix EP1S10 using the Quartus II platform because of its enhanced DSP capability. Test case results showed an error percentage of around ±0.3% and ±0.5% for the detection of maternal and fetal heart rate respectively.