A three-phase half-bridge cascaded inverter with reduced number of input DC supply

© 2017 IEEE. Cascaded multilevel inverters (MLI) have recently received much attention due to its ability to perform well in various high voltage and high power applications with high efficiency. Cascaded inverters are able to generate high voltage output by utilizing a number of low voltage DC supp...

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Main Authors: Hasan, M., Abu-Siada, Ahmed, Islam, Syed, Muyeen, S.M.
Format: Conference Paper
Published: 2018
Online Access:http://hdl.handle.net/20.500.11937/71840
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author Hasan, M.
Abu-Siada, Ahmed
Islam, Syed
Muyeen, S.M.
author_facet Hasan, M.
Abu-Siada, Ahmed
Islam, Syed
Muyeen, S.M.
author_sort Hasan, M.
building Curtin Institutional Repository
collection Online Access
description © 2017 IEEE. Cascaded multilevel inverters (MLI) have recently received much attention due to its ability to perform well in various high voltage and high power applications with high efficiency. Cascaded inverters are able to generate high voltage output by utilizing a number of low voltage DC supplies and switches of low blocking voltage rating, which make cascaded MLI a cost effective choice for high voltage/power applications. The main drawback of cascaded MLI is the requirement of large number of isolated DC sources particularly, for three phase applications where the number of required input DC sources is three times that of single phase structure. In addition to the extra cost it will incur, the use of large number of DC supplies within the inverter will significantly increase its physical size, and complicate the management of such large number of DC sources. This paper presents a new topology for three phase MLI with a minimum number of input DC supplies. Symmetric and asymmetric input DC supply modes are developed for the proposed topology. Simulation and experimental results are provided to assess the performance of the proposed MLI topology.
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spelling curtin-20.500.11937-718402018-12-13T09:32:08Z A three-phase half-bridge cascaded inverter with reduced number of input DC supply Hasan, M. Abu-Siada, Ahmed Islam, Syed Muyeen, S.M. © 2017 IEEE. Cascaded multilevel inverters (MLI) have recently received much attention due to its ability to perform well in various high voltage and high power applications with high efficiency. Cascaded inverters are able to generate high voltage output by utilizing a number of low voltage DC supplies and switches of low blocking voltage rating, which make cascaded MLI a cost effective choice for high voltage/power applications. The main drawback of cascaded MLI is the requirement of large number of isolated DC sources particularly, for three phase applications where the number of required input DC sources is three times that of single phase structure. In addition to the extra cost it will incur, the use of large number of DC supplies within the inverter will significantly increase its physical size, and complicate the management of such large number of DC sources. This paper presents a new topology for three phase MLI with a minimum number of input DC supplies. Symmetric and asymmetric input DC supply modes are developed for the proposed topology. Simulation and experimental results are provided to assess the performance of the proposed MLI topology. 2018 Conference Paper http://hdl.handle.net/20.500.11937/71840 10.1109/AUPEC.2017.8282491 restricted
spellingShingle Hasan, M.
Abu-Siada, Ahmed
Islam, Syed
Muyeen, S.M.
A three-phase half-bridge cascaded inverter with reduced number of input DC supply
title A three-phase half-bridge cascaded inverter with reduced number of input DC supply
title_full A three-phase half-bridge cascaded inverter with reduced number of input DC supply
title_fullStr A three-phase half-bridge cascaded inverter with reduced number of input DC supply
title_full_unstemmed A three-phase half-bridge cascaded inverter with reduced number of input DC supply
title_short A three-phase half-bridge cascaded inverter with reduced number of input DC supply
title_sort three-phase half-bridge cascaded inverter with reduced number of input dc supply
url http://hdl.handle.net/20.500.11937/71840