An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis
© 2015 IEEE. In this paper, a Neural Network Deployment (NND) algorithm is presented to realize and synthesize Multi-Valued Logic (MVL) functions. The algorithm is combined with back-propagation learning capability and MVL operators. The operators are used to synthesize the functions. Consequently t...
| Main Authors: | , , , , , |
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| Format: | Conference Paper |
| Published: |
IEEE
2015
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| Online Access: | http://hdl.handle.net/20.500.11937/66742 |
| _version_ | 1848761381960024064 |
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| author | Chowdhury, A. Razali, M. Wyai, G. Gopal, Lenin Madon, B. Singh, A. |
| author_facet | Chowdhury, A. Razali, M. Wyai, G. Gopal, Lenin Madon, B. Singh, A. |
| author_sort | Chowdhury, A. |
| building | Curtin Institutional Repository |
| collection | Online Access |
| description | © 2015 IEEE. In this paper, a Neural Network Deployment (NND) algorithm is presented to realize and synthesize Multi-Valued Logic (MVL) functions. The algorithm is combined with back-propagation learning capability and MVL operators. The operators are used to synthesize the functions. Consequently the synthesized expressions are applied by the MVL neural operators. The advantages of NND-MVL algorithm are demonstrated by accuracy measurement of MVL neural operator realization. Furthermore, evaluation of NND-MVL algorithm is analyzed by its application, propagation delay and accuracy achieved for training with 4 hidden neurons. In a brief, an effort of training MVL neural operators and utilizing them for logic synthesis is observed. |
| first_indexed | 2025-11-14T10:30:47Z |
| format | Conference Paper |
| id | curtin-20.500.11937-66742 |
| institution | Curtin University Malaysia |
| institution_category | Local University |
| last_indexed | 2025-11-14T10:30:47Z |
| publishDate | 2015 |
| publisher | IEEE |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | curtin-20.500.11937-667422018-05-18T08:04:14Z An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis Chowdhury, A. Razali, M. Wyai, G. Gopal, Lenin Madon, B. Singh, A. © 2015 IEEE. In this paper, a Neural Network Deployment (NND) algorithm is presented to realize and synthesize Multi-Valued Logic (MVL) functions. The algorithm is combined with back-propagation learning capability and MVL operators. The operators are used to synthesize the functions. Consequently the synthesized expressions are applied by the MVL neural operators. The advantages of NND-MVL algorithm are demonstrated by accuracy measurement of MVL neural operator realization. Furthermore, evaluation of NND-MVL algorithm is analyzed by its application, propagation delay and accuracy achieved for training with 4 hidden neurons. In a brief, an effort of training MVL neural operators and utilizing them for logic synthesis is observed. 2015 Conference Paper http://hdl.handle.net/20.500.11937/66742 10.1109/ICSSA.2015.7322523 IEEE restricted |
| spellingShingle | Chowdhury, A. Razali, M. Wyai, G. Gopal, Lenin Madon, B. Singh, A. An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis |
| title | An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis |
| title_full | An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis |
| title_fullStr | An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis |
| title_full_unstemmed | An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis |
| title_short | An analysis of MVL neural operators using feed forward backpropagation: Realization and application of logic synthesis |
| title_sort | analysis of mvl neural operators using feed forward backpropagation: realization and application of logic synthesis |
| url | http://hdl.handle.net/20.500.11937/66742 |