Modelling the PDF Evolution in a CMOS Inverter during Switching

A model which facilitates the simulation of switching in a CMOS inverter, and a model for the associated PDF evolution, are proposed. The latter model is based on a Gaussian basis set. Simulation results, for the additive Gaussian white noise case, show, first, that the Gaussian assumption for the p...

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Main Author: Howard, Roy
Other Authors: Luca Varani
Format: Conference Paper
Published: IEEE 2013
Subjects:
Online Access:http://hdl.handle.net/20.500.11937/39889
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author Howard, Roy
author2 Luca Varani
author_facet Luca Varani
Howard, Roy
author_sort Howard, Roy
building Curtin Institutional Repository
collection Online Access
description A model which facilitates the simulation of switching in a CMOS inverter, and a model for the associated PDF evolution, are proposed. The latter model is based on a Gaussian basis set. Simulation results, for the additive Gaussian white noise case, show, first, that the Gaussian assumption for the probability density function of the output jitter is valid at high input noise levels but with deviations from the Gaussian form for the propagation delay. Second, the output noise variance at a set time varies and is a maximum close to the midpoint between the high and low states. Third, the rms jitter of the output signal increases with the input rise time and the output load capacitance but decreases with increasing noise bandwidth. Fourth, the high correlation between the input and output signals leads to lower propagation delay jitter than expected.
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institution Curtin University Malaysia
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spelling curtin-20.500.11937-398892023-02-13T08:01:34Z Modelling the PDF Evolution in a CMOS Inverter during Switching Howard, Roy Luca Varani Fabien Pascal Jean-Marc Routoure PDF evolution CMOS inverter jitter switching A model which facilitates the simulation of switching in a CMOS inverter, and a model for the associated PDF evolution, are proposed. The latter model is based on a Gaussian basis set. Simulation results, for the additive Gaussian white noise case, show, first, that the Gaussian assumption for the probability density function of the output jitter is valid at high input noise levels but with deviations from the Gaussian form for the propagation delay. Second, the output noise variance at a set time varies and is a maximum close to the midpoint between the high and low states. Third, the rms jitter of the output signal increases with the input rise time and the output load capacitance but decreases with increasing noise bandwidth. Fourth, the high correlation between the input and output signals leads to lower propagation delay jitter than expected. 2013 Conference Paper http://hdl.handle.net/20.500.11937/39889 10.1109/ICNF.2013.6578962 IEEE fulltext
spellingShingle PDF evolution
CMOS inverter
jitter
switching
Howard, Roy
Modelling the PDF Evolution in a CMOS Inverter during Switching
title Modelling the PDF Evolution in a CMOS Inverter during Switching
title_full Modelling the PDF Evolution in a CMOS Inverter during Switching
title_fullStr Modelling the PDF Evolution in a CMOS Inverter during Switching
title_full_unstemmed Modelling the PDF Evolution in a CMOS Inverter during Switching
title_short Modelling the PDF Evolution in a CMOS Inverter during Switching
title_sort modelling the pdf evolution in a cmos inverter during switching
topic PDF evolution
CMOS inverter
jitter
switching
url http://hdl.handle.net/20.500.11937/39889