Efficient methods for synthesis of multivalued logic
Multi-Valued Logic (MVL) synthesis has economically revolutionized the method of designing logic functions. MVL has become an alternative to our universal binary logic. In this thesis, as a branch of emerging technology, MVL is considered for circuit simplification and size reduction. Reduced MVL ci...
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| Format: | Thesis |
| Language: | English |
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Curtin University
2014
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| Online Access: | http://hdl.handle.net/20.500.11937/335 |
| _version_ | 1848743349552414720 |
|---|---|
| author | Chowdhury, Adib Kabir |
| author_facet | Chowdhury, Adib Kabir |
| author_sort | Chowdhury, Adib Kabir |
| building | Curtin Institutional Repository |
| collection | Online Access |
| description | Multi-Valued Logic (MVL) synthesis has economically revolutionized the method of designing logic functions. MVL has become an alternative to our universal binary logic. In this thesis, as a branch of emerging technology, MVL is considered for circuit simplification and size reduction. Reduced MVL circuits are obtained by efficient synthesis algorithms. Different approaches on synthesizing techniques are investigated. Synthesized circuits are demonstrated with dynamic and static performances over binary and existing MVL techniques. |
| first_indexed | 2025-11-14T05:44:10Z |
| format | Thesis |
| id | curtin-20.500.11937-335 |
| institution | Curtin University Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-14T05:44:10Z |
| publishDate | 2014 |
| publisher | Curtin University |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | curtin-20.500.11937-3352017-02-20T06:41:50Z Efficient methods for synthesis of multivalued logic Chowdhury, Adib Kabir Multi-Valued Logic (MVL) synthesis has economically revolutionized the method of designing logic functions. MVL has become an alternative to our universal binary logic. In this thesis, as a branch of emerging technology, MVL is considered for circuit simplification and size reduction. Reduced MVL circuits are obtained by efficient synthesis algorithms. Different approaches on synthesizing techniques are investigated. Synthesized circuits are demonstrated with dynamic and static performances over binary and existing MVL techniques. 2014 Thesis http://hdl.handle.net/20.500.11937/335 en Curtin University fulltext |
| spellingShingle | Chowdhury, Adib Kabir Efficient methods for synthesis of multivalued logic |
| title | Efficient methods for synthesis of multivalued logic |
| title_full | Efficient methods for synthesis of multivalued logic |
| title_fullStr | Efficient methods for synthesis of multivalued logic |
| title_full_unstemmed | Efficient methods for synthesis of multivalued logic |
| title_short | Efficient methods for synthesis of multivalued logic |
| title_sort | efficient methods for synthesis of multivalued logic |
| url | http://hdl.handle.net/20.500.11937/335 |