Hardware-based text-to-braille translator

This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, thecircuit presented is able to carry out text-to-Braille translation in hardware. The translator is based on the...

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Bibliographic Details
Main Authors: Zhang, Xuan, Ortega-Sanchez, Cesar, Murray, Iain
Other Authors: ACM Special Interest Group on Accessible Computing
Format: Conference Paper
Published: Association for Computing Machinery 2006
Subjects:
Online Access:1331
http://hdl.handle.net/20.500.11937/15695
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author Zhang, Xuan
Ortega-Sanchez, Cesar
Murray, Iain
author2 ACM Special Interest Group on Accessible Computing
author_facet ACM Special Interest Group on Accessible Computing
Zhang, Xuan
Ortega-Sanchez, Cesar
Murray, Iain
author_sort Zhang, Xuan
building Curtin Institutional Repository
collection Online Access
description This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, thecircuit presented is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn [1]. The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators.
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format Conference Paper
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institution Curtin University Malaysia
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last_indexed 2025-11-14T07:13:24Z
publishDate 2006
publisher Association for Computing Machinery
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spelling curtin-20.500.11937-156952018-04-13T07:05:54Z Hardware-based text-to-braille translator Zhang, Xuan Ortega-Sanchez, Cesar Murray, Iain ACM Special Interest Group on Accessible Computing FPGA design Verification Algorithms Braille Languages Design This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, thecircuit presented is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn [1]. The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators. 2006 Conference Paper http://hdl.handle.net/20.500.11937/15695 10.1145/1168987.1169029 1331 Association for Computing Machinery restricted
spellingShingle FPGA design
Verification
Algorithms
Braille
Languages
Design
Zhang, Xuan
Ortega-Sanchez, Cesar
Murray, Iain
Hardware-based text-to-braille translator
title Hardware-based text-to-braille translator
title_full Hardware-based text-to-braille translator
title_fullStr Hardware-based text-to-braille translator
title_full_unstemmed Hardware-based text-to-braille translator
title_short Hardware-based text-to-braille translator
title_sort hardware-based text-to-braille translator
topic FPGA design
Verification
Algorithms
Braille
Languages
Design
url 1331
http://hdl.handle.net/20.500.11937/15695