Text-to-Braille Translator in a Chip
This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, the circuit presented in this paper is able to carry out text-to-Braille translation in hardware. The translator i...
| Main Authors: | , , |
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| Format: | Conference Paper |
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Bangladesh University of Engineering and Technology
2006
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| Online Access: | http://hdl.handle.net/20.500.11937/12628 |
| _version_ | 1848748128672415744 |
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| author | Zhang, Xuan Ortega-Sanchez, Cesar Murray, Iain |
| author_facet | Zhang, Xuan Ortega-Sanchez, Cesar Murray, Iain |
| author_sort | Zhang, Xuan |
| building | Curtin Institutional Repository |
| collection | Online Access |
| description | This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, the circuit presented in this paper is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn (Blenkhorn 1997). The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, with superior throughput. |
| first_indexed | 2025-11-14T07:00:07Z |
| format | Conference Paper |
| id | curtin-20.500.11937-12628 |
| institution | Curtin University Malaysia |
| institution_category | Local University |
| last_indexed | 2025-11-14T07:00:07Z |
| publishDate | 2006 |
| publisher | Bangladesh University of Engineering and Technology |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | curtin-20.500.11937-126282017-09-13T16:02:37Z Text-to-Braille Translator in a Chip Zhang, Xuan Ortega-Sanchez, Cesar Murray, Iain Assistive technology FPGAs Embedded systems Braille translation This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, the circuit presented in this paper is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn (Blenkhorn 1997). The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, with superior throughput. 2006 Conference Paper http://hdl.handle.net/20.500.11937/12628 10.1109/ICECE.2006.355685 Bangladesh University of Engineering and Technology fulltext |
| spellingShingle | Assistive technology FPGAs Embedded systems Braille translation Zhang, Xuan Ortega-Sanchez, Cesar Murray, Iain Text-to-Braille Translator in a Chip |
| title | Text-to-Braille Translator in a Chip |
| title_full | Text-to-Braille Translator in a Chip |
| title_fullStr | Text-to-Braille Translator in a Chip |
| title_full_unstemmed | Text-to-Braille Translator in a Chip |
| title_short | Text-to-Braille Translator in a Chip |
| title_sort | text-to-braille translator in a chip |
| topic | Assistive technology FPGAs Embedded systems Braille translation |
| url | http://hdl.handle.net/20.500.11937/12628 |