FPGA implementation of wideband IQ imbalance correction in OFDM receivers

This paper describes the implementation of a digital compensation scheme, called CSAD, for correcting the effects of wideband gain and phase imbalances in dual-branch OFDM receivers. The proposed scheme is implemented on a Xilinx Virtex-4 field programmable gate array (FPGA). The flexible architectu...

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Bibliographic Details
Main Authors: Palipana, Rajitha, Chung, Kah-Seng
Other Authors: ICCSC 2008 Technical Program Committee
Format: Conference Paper
Published: IEEE eXpress Conference Publishing 2008
Online Access:http://hdl.handle.net/20.500.11937/12595
Description
Summary:This paper describes the implementation of a digital compensation scheme, called CSAD, for correcting the effects of wideband gain and phase imbalances in dual-branch OFDM receivers. The proposed scheme is implemented on a Xilinx Virtex-4 field programmable gate array (FPGA). The flexible architecture of the implementation makes it readily adaptable for different broadband applications, such as DVB-T/H, WLAN, and WiMAX. The proposed correction scheme is resilient against multipath fading and frequency offset. When applied to DVB-T, it is shown that an 11-bit arithmetic precision is sufficient to achieve the required BER of 2x10-4 at an SNR of 16.5 dB. Using this bit-precision, the implementation consumes 1686 Virtex-4 slices equivalent to about 42600 gates.