| _version_ |
1860797362973179904
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| building |
INTELEK Repository
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Online Access
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| collectionurl |
https://intelek.unisza.edu.my/intelek/pages/search.php?search=!collection407072
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| date |
2019-12-30 17:05:07
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| format |
Restricted Document
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| id |
12416
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UniSZA
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| originalfilename |
6718-01-FH02-FIK-20-39373.pdf
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| person |
Marvin Josh Gelera-Adefuin
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| recordtype |
oai_dc
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| resourceurl |
https://intelek.unisza.edu.my/intelek/pages/view.php?ref=12416
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| spelling |
12416 https://intelek.unisza.edu.my/intelek/pages/view.php?ref=12416 https://intelek.unisza.edu.my/intelek/pages/search.php?search=!collection407072 Restricted Document Article Journal application/pdf 4 1.6 Adobe Acrobat Pro DC 20 Paper Capture Plug-in Marvin Josh Gelera-Adefuin 2019-12-30 17:05:07 6718-01-FH02-FIK-20-39373.pdf UniSZA Private Access Design of low power transceiver on Spartan-3 and Spartan-6 FPGA International Journal of Innovative Technology and Exploring Engineering (IJITEE) In this research work, a low power transceiver is designed using Spartan-3 and Spartan-6 Field-Programmable Gate Array (FPGA). In this work, a Universal Asynchronous Receiver Transmitter (UART) device is used as a transceiver. The implementation of UART is possible with EDA tools called Xilinx 14.1 and the results of the power analysis are targeted on Spartan-3 and Spartan-6 FPGA. The variation of different power of chips that are fabricated on FPGA for e.g., Input/Output (I/O) power consumption, Leakage power dissipation, Signal power utilization, Logic power usage, and the use of Total power, is observed by changing the voltage supply. This research work shows how the change in voltage influence the power consumption of UART on Spartan-3 and Spartan-6 FPGA devices. It is observed that Spartan-6 is found to be more powerefficient as voltage supply increases. 8 12S2 27-30
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| spellingShingle |
Design of low power transceiver on Spartan-3 and Spartan-6 FPGA
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| summary |
In this research work, a low power transceiver is designed using Spartan-3 and Spartan-6 Field-Programmable Gate Array (FPGA). In this work, a Universal Asynchronous Receiver Transmitter (UART) device is used as a transceiver. The implementation of UART is possible with EDA tools called Xilinx 14.1 and the results of the power analysis are targeted on Spartan-3 and Spartan-6 FPGA. The variation of different power of chips that are fabricated on FPGA for e.g., Input/Output (I/O) power consumption, Leakage power dissipation, Signal power utilization, Logic power usage, and the use of Total power, is observed by changing the voltage supply. This research work shows how the change in voltage influence the power consumption of UART on Spartan-3 and Spartan-6 FPGA devices. It is observed that Spartan-6 is found to be more powerefficient as voltage supply increases.
|
| title |
Design of low power transceiver on Spartan-3 and Spartan-6 FPGA
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| title_full |
Design of low power transceiver on Spartan-3 and Spartan-6 FPGA
|
| title_fullStr |
Design of low power transceiver on Spartan-3 and Spartan-6 FPGA
|
| title_full_unstemmed |
Design of low power transceiver on Spartan-3 and Spartan-6 FPGA
|
| title_short |
Design of low power transceiver on Spartan-3 and Spartan-6 FPGA
|
| title_sort |
design of low power transceiver on spartan-3 and spartan-6 fpga
|