Search Results - Senthilpari, C.

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  1. 1
    Design of a low-power, high performance, 8×8bit multiplier using a Shannon-based adder cell

    Design of a low-power, high performance, 8×8bit multiplier using a Shannon-based adder cell by SENTHILPARI, C, SINGH, A, DIWAKAR, K

    Published 2008
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  2. 2
    Highly stable Delta-Sigma Modulator for industrial applications

    Highly stable Delta-Sigma Modulator for industrial applications by Diwakar, K., Senthilpari, C., Singh, Ajay Kumar

    Published 2008
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  3. 3
    Low power and high speed 8x8 bit multiplier using non-clocked Pass Transistor Logic

    Low power and high speed 8x8 bit multiplier using non-clocked Pass Transistor Logic by Senthilpari, C., Singh, Ajay Kumar, Diwakar, K.

    Published 2007
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  4. 4
    Power Deduction in Digital Signal Processing Circuit using Inventive CPL Subtractor Circuit

    Power Deduction in Digital Signal Processing Circuit using Inventive CPL Subtractor Circuit by Senthilpari, C., Diwakar, K., Prabhu, C.M.R., Singh, Ajay Kumar

    Published 2006
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